When it comes to chip or integrated circuit device packaging, it is often desirable and sometimes imperative to have a relatively high device packaging density. Device packaging density can be defined as the number of devices per unit package volume. To such end, multichip module (MCM) packages are increasingly attractive for a variety of reasons. For example, MCM packages, which contain more than one chip per package, provide increased functionality of a given package, and decrease the interconnection length among chips in the package, thereby reducing signal delays and access times among chips.
One common MCM package is the three-dimensional “stacked” MCM package, in which one chip is disposed on a substrate and one or more other chips are stacked successively on top of one another and the first chip. Interconnections among chips and conductive traces on the common substrate are electrically made via bond wires.
FIG. 1 shows a cross-sectional view of a stacked multichip module (MCM) package 110 according to a known configuration. As shown, the MCM package 110 includes a substrate 111, a first chip 112 and a second chip 113. First chip 112 includes a bondable surface 121 and an active surface 122. Bondable surface 121 is adhered to substrate 111 by means of an adhesive, such as an epoxy, thermoplastic material, tape, tapes coated with thermoplastic materials, etc. Active surface 122 includes an active circuit area (not shown) typically in the center of first chip 112, and multiple bonding pads 112a located peripheral to the active circuit area. Similarly, second chip 113 includes a bondable surface 123 and an active surface 124. Active surface 124 also includes an active circuit area (not shown) typically in the center of second chip 113, and multiple bonding pads 113a located peripheral to the active circuit area.
The active circuit area of first chip 112 is covered by a passivation layer 125. An adhesive layer 126 is interposed between and connects passivation layer 125 and an interposer 127. Interposer 127 is often made of a material similar in properties to first chip 112 and second chip 113 in order to avoid thermal expansion mismatch over temperature variations. For example, if first chip 112 and second chip 113 are made of bulk silicon, interposer 127 should also be made of silicon. Interposer 127 has a thickness sufficient to allow clearance and access to the bond pads 112a along the edges of first chip 112. Interposer 127 also serves as a pedestal for supporting second chip 113. An adhesive layer 128 is disposed between and connects interposer 127 and bondable surface 123 of second chip 113.
Several bond wires 114 are bonded to and between respective bonding pads 112a on first chip 112 and substrate 111. Similarly, several bond wires 116 are bonded to and between respective bonding pads 113a on second chip 113 and substrate 111.
One application in which stacked MCM packages are commonly used is space applications, or applications in other environments wherein physical space is limited and tolerance to high levels of radiation required. Packages with such tolerance to high levels of radiation are referred to as “hardened” packages. The chips in such hardened packages are also typically “hardened” through the addition of redundant circuitry and/or error detection and correction circuitry so that the chips function properly in high radiation environments like space. Due to the hardened nature of the chips used in such environments, manufacturing costs for these chips can be inordinately expensive—often tens or even hundreds of times more expensive than counterparts of equivalent complexity used in consumer applications. For example, a hardened microprocessor could cost $10,000.
Unfortunately, due to current methods for manufacturing an MCM package in a stacked configuration, each chip or die in an MCM is so securely affixed to those above and below it that separation of that chip from the body of the MCM requires processes that are expensive, require high amounts of heat, or both. Thus, reworking or replacing a chip or die that has failed within a stacked MCM package often results in the destruction of one or more chips immediately above or below it. This naturally multiplies the cost of the original chip failure.
Consequently, it is desirable to provide an improved system and method for both manufacturing stacked MCM packages, and for reworking specific failed chips or dies within such packages.